Cadence Enables SensorDynamics to Reduce Design Cycles and Speed Successful Tapeout; Cadence Virtuoso Custom IC Design Platform Delivers First-Pass Silicon and Faster Time to Market
BRACKNELL, England—(BUSINESS WIRE)—Aug. 31, 2005—
Cadence Design Systems, Inc. (NYSE:CDN)(Nasdaq:CDN)
today announced that SensorDynamics, a supplier of integrated
microsensors, successfully deployed the Cadence(R) Virtuoso(R) custom
design platform for its latest chip designed for intelligent sensor
interfaces. The Cadence technology brought SensorDynamics reduced
design cycles and significant time savings. The chip was produced in
STMicroelectronics' BCD6 process technology, achieving first-pass
silicon.
With the use of Virtuoso XL Layout Editor and Virtuoso Chip
Assembly Router, SensorDynamics achieved significant time savings for
analog top routing and analog assembly. In addition, the use of the
VHDL-AMS verification environment helped identify and solve a number
of design bugs, which SensorDynamics claims would not have been
discovered with a traditional methodology.
With Virtuoso AMS Designer simulator for VHDL-AMS verification,
SensorDynamics was able to run intensive tests currently not possible
with other methodologies.
"The Virtuoso platform was the most intrinsic part of this design
flow, which helped us to move from first chip and block ideas to final
silicon with a minimum number of design cycles," said Hubertus Christ,
CEO SensorDynamics. "In spite of using a design flow which was yet not
released from the foundry, we were able to produce a first-pass
silicon success in a fast and efficient way."
The Virtuoso platform is a comprehensive system that enables
design teams to deliver silicon that meets all specifications, as well
as their schedules. It includes a specification-driven environment,
multi-mode simulation, accelerated layout, advanced silicon analysis,
and a full-chip integration environment.
"Once again the Virtuoso platform technology played a significant
role in helping SensorDynamics meet its design goals and achieve a
successful tapeout," said Jacques-Olivier, vice president R&D Europe,
Cadence Design Systems. "We are delighted that SensorDynamics has
testified that full testing and verification of mixed-signal design
was possible only with VHDL-AMS methodology using Virtuoso AMS
Designer."
About Cadence
Cadence enables global electronic-design innovation and plays an
essential role in the creation of today's integrated circuits and
electronics. Customers use Cadence software and hardware,
methodologies, and services to design and verify advanced
semiconductors, printed circuit boards and systems used in consumer
electronics, networking and telecommunications equipment, and computer
systems. Cadence reported 2004 revenues of approximately $1.2 billion,
and has approximately 5,000 employees. The company is headquartered in
San Jose, Calif., with sales offices, design centers, and research
facilities around the world to serve the global electronics industry.
More information about the company, its products, and services is
available at www.cadence.com.
Cadence, Virtuoso, and the Cadence logo are registered trademarks
of Cadence Design Systems, Inc. All other trademarks are the property
of their respective owners.
Contact:
Cadence Design Systems, Inc.
Andrea Huse, +49 (0) 89 4563 1726
Email Contact
Doron Aronson, 408-428-4404
Email Contact
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